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is there any way to force u-boot to read spi nor flash in 4 byte addressing mode rather than switching from 3 bytes to 4?

Hardware:

I have a custom-built board based on mt7628nn with 128 MB DDR2 RAM and 32 mb winbond flash w25q256jv.

The problem:

Recently I noticed an issue that in openwrt, whenever watchdog triggers reset it does not reset winbond flash back to 3 bytes addressing mode that causes u-boot be unable to start as it is expecting 3 bytes addressing.

The solution:

In order to prevent such issue, I want to set u-boot to start only in 4 byte addressing mode. MT7628 datasheet allows to do so by setting SPI_CS1 to "1". I know it is a very bad hardware design but barely can't do anything to fix it.

In this case mt7628 will always boot in XTAL 4 byte addressing. However, no matter how I tried to configure u-boot is not willing to start in 4 byte addressing mode. I am using 2020.04 release with spi-nor-core drivers (no SPL).

What I tried:

  1. sf probe returns - SF: Detected w25q256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB

I added 4B_OPCODES to drivers/mtd/spi/spi-nor-ids.c ->

{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },

removed CONFIG_SPI_FLASH_BAR from defconfig as requested in spi-nor-core.c code to set addr_width=4

  1. added quick and dirty code in spi-nor-core.c in

    static int spi_nor_init(struct spi_nor *nor)

to force nor->addr_width == 4 and set_4byte function whenever SNOR_MFR_WINBOND is detected

In both cases u-boot keeps botting in 3-byte XTAL and failing to show any sign of life when I set SPI_CS1 to 1

example:

CPU:   MT7628 Rev 1.2 - Boot from XTAL (3-Byte SPI Addr)

本文标签: linux kerneluboot 4 byte addressing spi nor flash on bootStack Overflow