cpu architecture - x86 TSC is really invariant? - Stack Overflow

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Intel x86 introduced the Invariant TSC. But how is its invariance maintained ?

In intel sdm 18.17.4 Invariant Time-keeping, mentioned:

The invariant TSC is based on the invariant timekeeping hardware (called Always Running Timer or ART), that runs at the core crystal clock frequency. The ratio defined by CPUID leaf 15H expresses the frequency relationship between the ART hardware and TSC

The relationship between TSC and ART:

TSC_Value = (ART_Value * CPUID.15H:EBX[31:0] )/ CPUID.15H:EAX[31:0] + K

If the value of CPUID.15H:EBX[31:0] / CPUID.15H:EBX[31:0]is less than or equal to one, it indicates that the precision of ART can maintain the precision of TSC. But what if it is the other way around ?

However, frequency of the core crystal clock of intel cpu is lower than that of the TSC:

ART CLOCK FREQ IS LOWER THAN TSC

and another 'clock' is needed to ensure a higher frequency for the TSC mentioned in the Intel SDM 33.8.3 Tracking Time:

• core crystal clock

  The ratio of the core crystal clock to timestamp counter frequency is known as P, and can be calculated as CPUID.15H:EBX[31:0] / CPUID.15H:EAX[31:0]. The frequency of the core crystal clock is fixed and lower than that of the timestamp counter.

So, this precision gap needs to be compensated by another clock.

HIGH FREQ CLOCK

In Intel SDM 33.8.3 Tracking Time mentions:

• Processor timestamp counter

  This counter increments at the max non-turbo or P1 frequency, and its value is returned on a RDTSC. Its frequency is fixed.

It seems to mention here that the TSC operates at the maximum non-turbo or P1 frequency, which appears to be a fixed value.

However, in Intel SDM 33.8.3.1 Time Domain Relationships, it provides a more granular definition of how the TSC is calculated:

TimeStampValue = (CoreCrystalClockValue * P) + AdjustedProcessorCycles + Software_Offset

AdjustedProcessorCycles:

The AdjustedProcessorCycles component provides the fine-grained distance from the rising edge of the last core crystal clock. Specifically, it is a cycle count in the same frequency as the timestamp counter from the last crystal clock rising edge. The value is adjusted based on the ratio of the processor core clock frequency to the Maximum Non-Turbo (or P1) frequency.

This update method is similar to the kernel's timekeeping mechanism, which updates time in a tick-like manner and between each tick, a higher precision clock source is needed to calculate the time since the last tick.

It seems that the 'tick' (referring to the periodic rising edge of the core crystal clock) is an important guarantee for maintaining TSC invariance. But does the TSC really increment at a constant frequency between the two 'ticks'?

TSC is real invariant ???

The previous part mentions that the distance from the rising edge of the last core crystal clock will adjust based on the ratio of the processor core clock to the Maximum Non-Turbo (or P1) frequency. This means that the frequency of change of the cycle value is related to the processor core clock, which in turn varies. Therefore, it calculates a ratio with a constant (Maximum Non-Turbo (or P1)) to ensure the accuracy of its value.

However, this also relies on the processor core clock frequency not changing between the two 'ticks'. But is this really the case ? If the frequency is truly fixed between two 'ticks,' then why is there a need for another 'ART' to perform timekeeping?

Or is TSC a form of pseudo-invariant ?

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